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Description: DDR2 SDRAM 控制器的FPGA实现-DDR2 SDRAM controller FPGA to achieve
Platform: |
Size: 84992 |
Author: 白皓 |
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Description: 这个是一个基于FPGA的SDRAM控制器系统,实现对SDRAM的读写操作,用来实现时序的控制-This is an FPGA-based SDRAM controller system, the read and write operations to SDRAM to achieve the control of timing
Platform: |
Size: 2171904 |
Author: jyb |
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Description: SDRAM存储器芯片,FPGA的接口控制,VHDL语言编写-SDRAM memory chips, FPGA interface control, VHDL language
Platform: |
Size: 776192 |
Author: wang |
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Description: 使用Verilog控制美光CMOS图像处理器,并转存到SDRAM中。使用FPGA为QL的带fuse系列-Control the use of Verilog Micron CMOS image processor and SDRAM in转存到. FPGA for use with QL series fuse
Platform: |
Size: 36864 |
Author: NOOW |
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Description: 摄像头的使用在当今信息化社会中越来越被重视,它可以实时采集现场环境信息,被广
用于安防、工业、交通、商业、金融、体育、军事等领域。本方案主要是基于 Actel Fla
构的 FPGA 来实现视频数据转换、 SDRAM 缓存控制、 TFT 时序控制等功能, 并通过 FPG
活的结构实现摄像头图像的采集与数据处理的功能。 -ActelFPGA_Camera_ApplicationNote
Platform: |
Size: 267264 |
Author: zxx359654879 |
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Description: 基于FPGA的SDRAM控制器 Realization FPGA-based SDRAM Controller with Verilog-FPGA-based SDRAM Controller Realization FPGA-based SDRAM Controller with Verilog
Platform: |
Size: 1755136 |
Author: monica-sun |
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Description: This code is a SDRAM Controller IP Core for FPGA to interface with SDRAM Memory.
This code is based Xilinx FPGA Playform.
Platform: |
Size: 108544 |
Author: peace |
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Description: SDRAM控制器在FPGA实现源代码,能实现burst传输-SDRAM controller in FPGA realization of the source code, can achieve burst transfer
Platform: |
Size: 253952 |
Author: 弘历 |
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Description: FPGA对SDRAM的控制操作源码,用VERILOG硬件描述语言编写,包含的文件一共有:hostcont.v,inc.h,pinouts.ucf,sdram.v,top.v,tst_inc.h-Control of operation of the SDRAM FPGA source code, using VERILOG hardware description language, the file contains a total of: hostcont.v, inc.h, pinouts.ucf, sdram.v, top.v, tst_inc.h
Platform: |
Size: 21504 |
Author: 陈维 |
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Description: FPGA与DSP数据接口转换时序,简单实用的,SDRAM时序读写数据。-FPGA and DSP data interface conversion timing, simple and practical, SDRAM read and write data timing.
Platform: |
Size: 13487104 |
Author: 郝金 |
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Description: SDR SDRAM 控制器的源代码 altera公司的-source code from altera
Platform: |
Size: 717824 |
Author: wela |
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Description: FPGA实现七个实验的源程序。SDRAM测试,按键及PIO口中断实验,定时器实验,seg7实验,sopc_led实验,flash烧写,fpga_led,锁相环。-FPGA realization of the seven experiments of the source. SDRAM test, test buttons and PIO port interrupt, timer experiment, seg7 experiment, sopc_led test, flash programming, fpga_led, PLL.
Platform: |
Size: 12833792 |
Author: Air |
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Description: FPGA SDRAM控制器Verilog源码,通过测试-FPGA SDRAM VERILOG
Platform: |
Size: 5120 |
Author: 大海 |
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Description: FPGA测试程序,使用XC3S250E对SDRAM进行读写的测试程序,SDRAM使用的是HY57V281620, 大小为128M。-FPGA test procedure, the use of XC3S250E SDRAM read and write on the test procedure, SDRAM using HY57V281620, size of 128M.
Platform: |
Size: 541696 |
Author: gq |
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Description: 基于FPGA对sdram控制器的设计(VERILOG语言)-FPGA-based controller design of sdram (VERILOG language)
Platform: |
Size: 2823168 |
Author: 黄飞 |
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Description: FPGA的SDRAM
FPGA的SDRAMFPGA的SDRAM-FPGA SDRAM FPGA SDRAM
Platform: |
Size: 4290560 |
Author: 陈华峰 |
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Description: 用FPGA实现对sdram读写的源代码,芯片用的是Altera公司的,需要的同学可以看看!-FPGA realization of sdram read and write the source code, the chip using Altera' s, students need to take a look!
Platform: |
Size: 521216 |
Author: zhachshen |
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Description: FPGA控制SDRAM的源程序,SDRAM控制起来比较麻烦,时序复杂,本程序将其封装了一个模块,可以方便地调用.-FPGA to control the source of SDRAM, SDRAM control is too much trouble, the timing complexity of the procedure to package a module, you can easily call.
Platform: |
Size: 2339840 |
Author: 刘成岩 |
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Description: 给予FPGA的SDRAM-FPGA and SDRAM
Platform: |
Size: 72704 |
Author: 王东 |
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Description: 基于FPGA的SDRAM控制器设计,有效的实现FPGA与SDRAM的读写过程-SDRAM FPGA-based controller design, the effective implementation of FPGA and SDRAM read and write process
Platform: |
Size: 1998848 |
Author: gongwenbiao |
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